Sanada Y., Ohira T., Chikuda S., Igarashi M., Ikebe M., Asai T., and Motomura M., "FPGA implementation of single-image super resolution based on frame-bufferless box filtering," Journal of Signal Processing, vol. 17, no. 4, pp. 111-114 (2013).
国際会議
Sanada Y., Ohata K., Ogaki T., Matsuyama K., Ohira T., Chikuda S., Igarashi M., Kuroda T., Ikebe M., Asai T., and Motomura M., "FPGA implementation of a memory-efficient stereo vision algorithm based on 1-D guided filtering," Proceedings of the 2014 International Conference on Circuits, Systems, and Control, pp. 25-30, Lindner Grand Hotel Beau Rivage, Interlaken, Switzerland (Feb. 22-24, 2014).
Ohata K., Sanada Y., Ogaki T., Matsuyama K., Ohira T., Chikuda S., Igarashi M., Ikebe M., Asai T., Motomura M., and Kuroda T., "Hardware-oriented stereo vision algorithm based on 1-D guided filtering and its FPGA implementation," Proceedings of the 2013 IEEE International Conference on Electronics, Circuits, and Systems, pp. 169-172, Yas Viceroy Hotel, Abu Dhabi, UAE (Dec. 8-11, 2013).
Chikuda S., Ohira T., Sanada Y., Igarashi M., Ikebe M., Asai T., and Motomura M., "FPGA implementation of 60-FPS QVGA-to-VGA single-image super resolution," in Proc. of the 2013 International Conference on Solid State Devices and Materials, pp. 136-137, Hilton Fukuoka Sea Hawk, Fukuoka, Japan (Sep. 24-27, 2013).
Sanada Y., Ohira T., Chikuda S., Igarashi M., Ikebe M., Asai T., and Motomura M., "FPGA implementation of single-image super resolution based on frame-bufferless box filtering," Proceedings of the 2013 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 516-519, Courtyard King Kamehameha's Kona Beach Hotel, The Island of Hawaii, U.S.A. (Mar. 4-7, 2013).
